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  an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. tlv733p-q1 sbvs283d ? august 2016 ? revised december 2018 tlv733p-q1 capacitor-free, 300-ma, low dropout (ldo) linear regulator 1 1 features 1 ? qualified for automotive applications ? aec-q100 qualified: ? device temperature grade 1: ? 40 c to 125 c ambient operating temperature ? device hbm esd classification level 2 ? device cdm esd classification level c4b ? device junction temperature range: ? 40 c to 150 c ? input voltage range: 1.4 v to 5.5 v ? stable operation with or without capacitors ? foldback overcurrent protection ? package: ? 2.0-mm 2.0-mm wson-6 ? 2.9-mm 1.6-mm sot-23 ? very low dropout: 125 mv at 300 ma (3.3 v out ) ? accuracy: 1% typical, 1.4% maximum ? low i q : 34 a ? available in fixed-output voltages: 1.0 v to 3.3 v ? high psrr: 50 db at 1 khz ? active output discharge 2 applications ? camera modules ? automotive infotainment ? navigation systems 3 description the tlv733p-q1 family of low dropout (ldo) linear regulators are ultra-small, low quiescent current ldos that can source 300 ma with good line and load transient performance. these devices provide a typical accuracy of 1%. the tlv733p-q1 family is designed with a modern capacitor-free architecture to ensure stability without an input or output capacitor. the removal of the output capacitor allows for a very small solution size, and can eliminate inrush current at startup. furthermore, the tlv733p-q1 family is also stable with ceramic output capacitors if an output capacitor is necessary. the tlv733p-q1 family also provides foldback current control during device power-up and enabling if an output capacitor is used. this functionality is especially important in battery- operated devices. the tlv733p-q1 family provides an active pulldown circuit to quickly discharge output loads when disabled. the tlv733p-q1 family is available in the 6-pin drv (wson) and 5-pin dbv (sot-23) packages. device information (1) part number package body size (nom) tlv733p-q1 wson (6) 2.00 mm 2.00 mm sot-23 (5) 2.90 mm 1.60 mm (1) for all available packages, see the package option addendum at the end of the data sheet. typical application circuit dropout voltage vs output current tlv733p-q1 in en out gnd c out c in optional optional on off i out (ma) v do (mv) 0 30 60 90 120 150 180 210 240 270 300 0 20 40 60 80 100 120 140 160 180 d020 v out = 3.3 v v out = 1.8 v tools & software technical documents ordernow productfolder support &community
2 tlv733p-q1 sbvs283d ? august 2016 ? revised december 2018 www.ti.com product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated table of contents 1 features .................................................................. 1 2 applications ........................................................... 1 3 description ............................................................. 1 4 revision history ..................................................... 2 5 pin configuration and functions ......................... 3 6 specifications ......................................................... 4 6.1 absolute maximum ratings ...................................... 4 6.2 esd ratings .............................................................. 4 6.3 recommended operating conditions ....................... 4 6.4 thermal information .................................................. 4 6.5 electrical characteristics ........................................... 5 6.6 timing requirements ................................................ 5 6.7 typical characteristics .............................................. 6 7 detailed description ............................................ 10 7.1 overview ................................................................. 10 7.2 functional block diagram ....................................... 10 7.3 feature description ................................................. 11 7.4 device functional modes ........................................ 12 8 application and implementation ........................ 13 8.1 application information ............................................ 13 8.2 typical applications ................................................ 15 9 power supply recommendations ...................... 17 10 layout ................................................................... 17 10.1 layout guidelines ................................................. 17 10.2 layout examples ................................................... 17 11 device and documentation support ................. 18 11.1 device support ...................................................... 18 11.2 receiving notification of documentation updates 18 11.3 community resources .......................................... 18 11.4 trademarks ........................................................... 18 11.5 electrostatic discharge caution ............................ 18 11.6 glossary ................................................................ 18 12 mechanical, packaging, and orderable information ........................................................... 19 4 revision history note: page numbers for previous revisions may differ from page numbers in the current version. changes from revision c (october 2018) to revision d page ? changed status of dbv package to production data ........................................................................................................... 1 changes from revision b (august 2018) to revision c page ? added dbv package to document as preview ....................................................................................................................... 1 changes from revision a (august 2016) to revision b page ? added device junction temperature range features bullet ................................................................................................ 1 ? changed t j maximum specification from 135 c to 150 c ..................................................................................................... 4 ? changed electrical characteristics conditions statement from t j , t a = ? 40 c to +125 c to t j = ? 40 c to +150 c, t a = ? 40 c to +125 c ................................................................................................................................................................. 5 ? added last 6 rows to v do parameter ..................................................................................................................................... 5 ? added second row to i gnd parameter, added temperature range to first row test conditions ............................................ 5 ? changed typical characteristics condition statement from t j = ? 40 c to +125 c to t j = ? 40 c to +150 c ....................... 6 ? changed operating junction temperature from ? 40 c to +135 c to ? 40 c to +150 c in overview section ........................ 10 ? changed junction temperature limit from 135 c to 150 c in thermal shutdown section.................................................... 11 changes from original (august 2016) to revision a page ? released to production .......................................................................................................................................................... 1
3 tlv733p-q1 www.ti.com sbvs283d ? august 2016 ? revised december 2018 product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 5 pin configuration and functions drv package 6-pin wson top view note: nc ? no internal connection. dbv package 5-pin sot-23 top view pin functions name no. i/o description drv dbv en 4 3 i enable pin. drive en greater than 0.9 v to turn on the regulator. drive en less than 0.35 v to put the ldo into shutdown mode. gnd 3 2 ? ground pin in 6 1 i input pin. a small capacitor is recommended from this pin to ground. see the input and output capacitor selection section for more details. nc 2, 5 4 ? no internal connection out 1 5 o regulated output voltage pin. for best transient response, use a small 1- f ceramic capacitor from this pin to ground. see the input and output capacitor selection section for more details. thermal pad ? ? the thermal pad is electrically connected to the gnd node. connect to the gnd plane for improved thermal performance. 1 in 2 gnd 3 en 4 nc 5 out not to scale 1 out 6 in 2 nc 5 nc 3 gnd 4 en not to scale gnd
4 tlv733p-q1 sbvs283d ? august 2016 ? revised december 2018 www.ti.com product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions . exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 6 specifications 6.1 absolute maximum ratings over operating junction temperature range (unless otherwise noted); all voltages are with respect to gnd (1) min max unit voltage v in ? 0.3 6.0 v v en ? 0.3 v in + 0.3 v out ? 0.3 3.6 current i out internally limited a output short-circuit duration indefinite temperature operating junction, t j ? 40 150 c storage, t stg ? 65 160 (1) aec q100-002 indicates that hbm stressing shall be in accordance with the ansi/esda/jedec js-001 specification. 6.2 esd ratings value unit v (esd) electrostatic discharge human-body model (hbm), per aec q100-002 (1) 2000 v charged-device model (cdm), per aec q100-011 all pins 500 corner pins (1, 3, 4, and 6) 750 6.3 recommended operating conditions over operating junction temperature range (unless otherwise noted) min nom max unit v in input range 1.4 5.5 v v out output range 1.0 3.3 v i out output current 0 300 ma v en enable range 0 v in v t j junction temperature ? 40 150 c t a ambient temperature ? 40 125 c (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.4 thermal information thermal metric (1) tlv733p-q1 unit drv (wson) dbv (sot-23) 6 pins 5 pins r ja junction-to-ambient thermal resistance 92.5 198.3 c/w r jc(top) junction-to-case (top) thermal resistance 123.9 118.4 c/w r jb junction-to-board thermal resistance 61.9 65.8 c/w jt junction-to-top characterization parameter 9.7 42.4 c/w jb junction-to-board characterization parameter 62.3 65.5 c/w r jc(bot) junction-to-case (bottom) thermal resistance 30.9 n/a c/w
5 tlv733p-q1 www.ti.com sbvs283d ? august 2016 ? revised december 2018 product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated (1) dropout voltage for the tlv73310p is not valid at room temperature. the device engages undervoltage lockout (v in < uvlo fall ) before the dropout condition is met. 6.5 electrical characteristics at operating temperature range (t j = ? 40 c to +150 c, t a = ? 40 c to +125 c), v in = v out(nom) + 0.5 v or 2.0 v (whichever is greater), i out = 1 ma, v en = v in , and c in = c out = 1 f (unless otherwise noted); all typical values are at t j = 25 c parameter test conditions min typ max unit v in input voltage 1.4 5.5 v dc output accuracy t j = 25 c ? 1% 1% ? 40 c t j 150 c ? 1.4% 1.4% uvlo undervoltage lockout v in rising 1.3 1.4 v v in falling 1.25 v o( vi) line regulation vi = v out(nom) + 0.5 v or 2.0 v (whichever is greater) to 5.5 v 1 mv v o( io) load regulation io = 1 ma to 300 ma 25 mv v do dropout voltage (1) v out = 0.98 v out(nom) , i out = 300 ma v out = 1.1 v, ? 40 c t j +125 c 510 mv 1.2 v v out < 1.5 v, ? 40 c t j 125 c 450 1.5 v v out < 1.8 v, ? 40 c t j 125 c 400 1.8 v v out < 2.5 v, ? 40 c t j 125 c 300 2.5 v v out < 3.3 v, ? 40 c t j 125 c 290 v out = 3.3 v, ? 40 c t j 125 c 125 270 v out = 1.1 v, ? 40 c t j 150 c 560 1.2 v v out < 1.5 v, ? 40 c t j 150 c 490 1.5 v v out < 1.8 v, ? 40 c t j 150 c 440 1.8 v v out < 2.5 v, ? 40 c t j 150 c 340 2.5 v v out < 3.3 v, ? 40 c t j 150 c 330 v out = 3.3 v, ? 40 c t j 150 c 320 i gnd ground pin current i out = 0 ma, ? 40 c t j 125 c 34 62 a i out = 0 ma, ? 40 c t j 150 c 78 i shdn shutdown current v en 0.35 v, 2.0 v v in 5.5 v, t j = 25 c 0.1 1 a psrr power-supply rejection ratio v out = 1.8 v, i out = 300 ma f = 100 hz 68 db f = 10 khz 35 f = 100 khz 28 v n output noise voltage bw = 10 hz to 100 khz, v out = 1.8 v, i out = 10 ma 120 v rms v en(hi) en pin high voltage (enabled) 0.9 0.63 v v en(lo) en pin low voltage (disabled) 0.52 0.35 v i en en pin current v en = 5.5 v 0.01 a pulldown resistor v in = 2.3 v 120 i lim output current limit 360 ma i os short-circuit current limit v out shorted to gnd, v out = 1.0 v 150 ma v out shorted to gnd, v out = 3.3 v 170 t sd thermal shutdown shutdown, temperature increasing 160 c reset, temperature decreasing 140 6.6 timing requirements min nom max unit t str startup time time from en assertion to 98% v out(nom) , v out = 1.0 v, i out = 0 ma 250 s time from en assertion to 98% v out(nom) , v out = 3.3 v, i out = 0 ma 800
6 tlv733p-q1 sbvs283d ? august 2016 ? revised december 2018 www.ti.com product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 6.7 typical characteristics at operating temperature range (t j = ? 40 c to +150 c), v in = v out(nom) + 0.5 v or 2.0 v (whichever is greater), i out = 1 ma, v en = v in , and c in = c out = 1 f (unless otherwise noted) figure 1. 1.8-v regulation vs v in (line regulation) and temperature figure 2. ground pin current vs i out and temperature figure 3. ground pin current vs v in i out = 0 ma figure 4. shutdown current vs v in and temperature figure 5. enable threshold vs temperature figure 6. output voltage vs 1.0-v foldback current limit and temperature i out (ma) i gnd ( p a) 0 30 60 90 120 150 180 210 240 270 300 25 30 35 40 45 50 55 60 65 70 d012 t j = -40 q c t j = 0 q c t j = 25 q c t j = 85 q c t j = 125 q c v in (v) i shdn ( p a) 0 1 2 3 4 5 6 0.01 0.1 1 10 100 d015 t j = -40 q c t j = 0 q c t j = 25 q c t j = 85 q c t j = 125 q c v in (v) v out (v) 2 2.5 3 3.5 4 4.5 5 5.5 1.796 1.798 1.8 1.802 1.804 1.806 1.808 1.81 1.812 1.814 1.816 d019 t j = -40 q c t j = 0 q c t j = 25 q c t j = 85 q c t j = 125 q c foldback current limit (ma) v out (v) 150 200 250 300 350 400 450 500 550 600 650 700 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 d023 t j = -40 q c t j = 0 q c t j = 25 q c t j = 85 q c t j = 125 q c v in (v) i gnd ( p a) 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 0 5 10 15 20 25 30 35 40 d013 t j = 25 q c t j ( q c) enable threshold (v) -40 -20 0 20 40 60 80 100 120 140 0.425 0.45 0.475 0.5 0.525 0.55 0.575 0.6 0.625 0.65 0.675 d014 v en(lo) v en(hi)
7 tlv733p-q1 www.ti.com sbvs283d ? august 2016 ? revised december 2018 product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated typical characteristics (continued) at operating temperature range (t j = ? 40 c to +150 c), v in = v out(nom) + 0.5 v or 2.0 v (whichever is greater), i out = 1 ma, v en = v in , and c in = c out = 1 f (unless otherwise noted) figure 7. output voltage vs 1.8-v foldback current limit and temperature figure 8. output voltage vs 3.3-v foldback current limit and temperature i out = 300 ma figure 9. power-supply rejection ratio vs frequency i out = 300 ma figure 10. output spectral noise density vs frequency and output voltage i out = 10 ma, 1- f output capacitor figure 11. line transient i out = 300 ma, 1- f output capacitor figure 12. line transient v out (1 v/div, ac coupled) time (20 s/div) v in (2 v/div) foldback current limit (ma) v out (v) 150 200 250 300 350 400 450 500 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 d021 t j = -40 q c t j = 0 q c t j = 25 q c t j = 85 q c t j = 125 q c foldback current limit (ma) v out (v) 150 200 250 300 350 400 450 500 0 0.5 1 1.5 2 2.5 3 3.5 d022 t j = -40 q c t j = 0 q c t j = 25 q c t j = 85 q c t j = 125 q c frequency (hz) noise density ( p v/ ? hz) 0.005 0.01 0.1 1 10 10 100 1k 10k 100k 1m d016 v out = 1 v v out = 1.8 v v out = 3.3 v frequency (hz) psrr (db) 0 10 20 30 40 50 60 70 80 10 100 1k 10k 100k 1m d017 no output capacitor 1- p f output capacitor v out (1 v/div, ac coupled) time (20 s/div) v in (2 v/div)
8 tlv733p-q1 sbvs283d ? august 2016 ? revised december 2018 www.ti.com product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated typical characteristics (continued) at operating temperature range (t j = ? 40 c to +150 c), v in = v out(nom) + 0.5 v or 2.0 v (whichever is greater), i out = 1 ma, v en = v in , and c in = c out = 1 f (unless otherwise noted) v in = 2.0 v, 1- f output capacitor, output current slew rate = 0.25 a/ s figure 13. 1.0-v, 50-ma to 300-ma load transient v in = 2.0 v, no output capacitor, output current slew rate = 0.25 a/ s figure 14. 1.0 v, 50-ma to 300-ma load transient v in = 3.8 v,1- f output capacitor, output current slew rate = 0.25 a/ s figure 15. 3.3 v, 50-ma to 300-ma load transient v in = 3.8 v, no output capacitor, output current slew rate = 0.25 a/ s figure 16. 3.3 v, 50-ma to 300-ma load transient r l = 6.2 , v en = v in , 1- f output capacitor figure 17. v in power-up and power-down r l = 6.2 , 1- f output capacitor figure 18. startup with en i load (100 ma/div) v out (200 mv/div, ac coupled) time (20 s/div) time (100 s/div) v out (500 mv/div) v en (500 mv/div) v out (1 v/ div ) time (100 s/ div ) v in (1 v/div) i load (200 ma/ div ) i load (100 ma/div) v out (100 mv/div, ac coupled) time (20 s/div) time (50 s/div) v out (100 mv/div, ac coupled) i load (200 ma/div) i load (100 ma/div) v out (200 mv/div, ac coupled) time (20 s/div)
9 tlv733p-q1 www.ti.com sbvs283d ? august 2016 ? revised december 2018 product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated typical characteristics (continued) at operating temperature range (t j = ? 40 c to +150 c), v in = v out(nom) + 0.5 v or 2.0 v (whichever is greater), i out = 1 ma, v en = v in , and c in = c out = 1 f (unless otherwise noted) i out = 300 ma, 1- f output capacitor figure 19. shutdown response with enable 1- f output capacitor figure 20. foldback current limit response time (100 s/div) v out (500 mv/div) v en (500 mv/div) time (100 s/div) i load (200 ma/div) v out (500 mv/div)
10 tlv733p-q1 sbvs283d ? august 2016 ? revised december 2018 www.ti.com product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 7 detailed description 7.1 overview the tlv733p-q1 belongs to a family of low dropout (ldo) linear regulators. these devices consume low quiescent current and deliver excellent line and load transient performance. these characteristics, combined with low noise and good psrr with low dropout voltage, make this family of devices ideal for portable consumer applications. this family of regulators offers foldback current limit, shutdown, and thermal protection. the operating junction temperature for this family of devices is ? 40 c to +150 c. 7.2 functional block diagram current limit uvlo in en out logic gnd tlv733p-q1 120 w thermal shutdown band gap
11 tlv733p-q1 www.ti.com sbvs283d ? august 2016 ? revised december 2018 product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 7.3 feature description 7.3.1 undervoltage lockout (uvlo) the tlv733p-q1 family uses an undervoltage lockout (uvlo) circuit that disables the output until the input voltage is greater than the rising uvlo voltage. this circuit ensures that the device does not exhibit any unpredictable behavior when the supply voltage is lower than the operational range of the internal circuitry. during uvlo disable, the output is connected to ground with a 120- pulldown resistor. 7.3.2 shutdown the enable pin (en) is active high. enable the device by forcing the en pin to exceed v en(hi) (0.9 v, minimum). turn off the device by forcing the en pin to drop below 0.35 v. if shutdown capability is not required, connect en to in. the tlv733p-q1 has an internal pulldown mosfet that connects a 120- resistor to ground when the device is disabled. the discharge time after disabling depends on the output capacitance (c out ) and the load resistance (r l ) in parallel with the 120- pulldown resistor. the time constant is calculated in equation 1 : (1) 7.3.3 internal foldback current limit the tlv733p-q1 has an internal foldback current limit that protects the regulator during fault conditions. the current allowed through the device is reduced when the output voltage falls. when the output is shorted, the ldo supplies a typical current of 150 ma. the output voltage is not regulated when the device is in current limit. in this condition, the output voltage is the product of the regulated current and the load resistance. when the device output is shorted, the pmos pass transistor dissipates power [(v in ? v out ) i os ] until thermal shutdown is triggered and the device turns off. after the device cools down, the internal thermal shutdown circuit turns the device back on. if the fault condition continues, the device cycles between current limit and thermal shutdown; see the thermal information table for more details. the foldback current-limit circuit limits the current allowed through the device to current levels lower than the minimum current limit at a nominal v out current limit (i lim ) during startup. see figure 6 to figure 8 for typical foldback current limit values. if the output is loaded by a constant-current load during startup, or if the output voltage is negative when the device is enabled, then the load current demanded by the load can exceed the foldback current limit and the device may not rise to the full output voltage. for constant-current loads, disable the output load until the tlv733p-q1 has fully risen to the nominal output voltage. the tlv733p-q1 pmos pass element has an intrinsic body diode that conducts current when the voltage at the out pin exceeds the voltage at the in pin. do not force the output voltage to exceed the input voltage because excessively high current can flow through the body diode. 7.3.4 thermal shutdown thermal shutdown protection disables the output when the junction temperature rises to approximately 160 c. disabling the device eliminates the power dissipated by the device, allowing the device to cool. when the junction temperature cools to approximately 140 c, the output circuitry is again enabled. depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit can cycle on and off. this cycling limits regulator dissipation, protecting the device from damage as a result of overheating. activating the thermal shutdown feature usually indicates excessive power dissipation as a result of the product of the (v in ? v out ) voltage and the load current. for reliable operation, limit junction temperature to 150 c (maximum). to estimate the margin of safety in a complete design, increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. the tlv733p-q1 internal protection circuitry protects against overload conditions but is not intended to be activated in normal operation. continuously running the tlv733p-q1 into thermal shutdown degrades device reliability. t = 120 r l 120 + r l c out
12 tlv733p-q1 sbvs283d ? august 2016 ? revised december 2018 www.ti.com product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 7.4 device functional modes 7.4.1 normal operation the device regulates to the nominal output voltage under the following conditions: ? the input voltage has previously exceeded the uvlo rising voltage and has not decreased below the uvlo falling threshold. ? the input voltage is greater than the nominal output voltage added to the dropout voltage. ? the enable voltage has previously exceeded the enable rising threshold voltage and has not decreased below the enable falling threshold. ? the output current is less than the current limit. ? the device junction temperature is less than the thermal shutdown temperature. 7.4.2 dropout operation if the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other conditions are met for normal operation, the device operates in dropout mode. in this condition, the output voltage is the same as the input voltage minus the dropout voltage. the transient performance of the device is significantly degraded because the pass device is in a triode state and no longer controls the current through the ldo. line or load transients in dropout can result in large output voltage deviations. 7.4.3 disabled the device is disabled under the following conditions: ? the input voltage is less than the uvlo falling voltage, or has not yet exceeded the uvlo rising threshold. ? the enable voltage is less than the enable falling threshold voltage or has not yet exceeded the enable rising threshold. ? the device junction temperature is greater than the thermal shutdown temperature. when the device is disabled, the active pulldown resistor discharges the output. table 1 shows the conditions that lead to the different modes of operation. table 1. device functional mode comparison operating mode parameter v in v en i out t j normal mode v in > v out(nom) + v do and v in > uvlo rise v en > v en(hi) i out < i lim t j < 160 c dropout mode uvlo rise < v in < v out(nom) + v do v en > v en(hi) i out < i lim t j < 160 c disabled mode (any true condition disables the device) v in < uvlo fall v en < v en(lo) ? t j > 160 c
13 tlv733p-q1 www.ti.com sbvs283d ? august 2016 ? revised december 2018 product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 8 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 8.1 application information 8.1.1 input and output capacitor selection the tlv733p-q1 uses an advanced internal control loop to obtain stable operation both with and without the use of input or output capacitors. dynamic performance is improved with the use of an output capacitor, and can be improved with an input capacitor. an output capacitance of 0.1 f or larger generally provides good dynamic response. use x5r- and x7r-type ceramic capacitors because these capacitors have minimal variation in value and equivalent series resistance (esr) over temperature. although an input capacitor is not required for stability, increased output impedance from the input supply can compromise the performance of the tlv733p-q1. good analog design practice is to connect a 0.1- f to 1- f capacitor from in to gnd. this capacitor counteracts reactive input sources and improves transient response, input ripple, and psrr. use an input capacitor if the source impedance is greater than 0.5 . use a higher-value capacitor if large, fast rise-time load transients are anticipated, or if the device is located several inches from the input power source. figure 21 shows the transient performance improvements with an external 1- f capacitor on the output versus no output capacitor. the data in this figure are taken with an increasing load step from 50 ma to 300 ma, and the peak output voltage deviation (load transient response) is measured. for low output current slew rates, ( < 0.1 a/ s), the transient performance of the device is similar with or without an output capacitor. when the current slew rate is increased, the peak voltage deviation is significantly increased. for loads that exhibit fast current slew rates above 0.1 a/ s, use an output capacitor. for best performance, the maximum recommended output capacitance is 100 f. output current stepped from 50 ma to 300 ma, output voltage change measured at positive di/dt figure 21. output voltage deviation vs load step slew rate some applications benefit from the removal of the output capacitor. in addition to space and cost savings, the removal of the output capacitor lowers inrush current as a result of eliminating the required current flow into the output capacitor at startup. in these cases, take care to ensure that the load is tolerant of the additional output voltage deviations. output load transient slew rate (a/ p s) peak output voltage change (%v out ) 0.01 0.1 1 0 5 10 15 20 25 30 35 d027 1- p f c out c out removed
14 tlv733p-q1 sbvs283d ? august 2016 ? revised december 2018 www.ti.com product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated application information (continued) 8.1.2 dropout voltage the tlv733p-q1 uses a pmos pass transistor to achieve low dropout. when (v in ? v out ) is less than the dropout voltage (v do ), the pmos pass device is in the linear region of operation and the input-to-output resistance is the r ds(on) of the pmos pass element. v do scales approximately with output current because the pmos device behaves like a resistor in dropout mode. as with any linear regulator, psrr and transient response degrade when (v in ? v out ) approaches dropout operation.
15 tlv733p-q1 www.ti.com sbvs283d ? august 2016 ? revised december 2018 product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 8.2 typical applications 8.2.1 dc-dc converter post regulation figure 22. dc-dc converter post regulation 8.2.1.1 design requirements table 2. design parameters parameter design requirement input voltage 1.8 v, 5% output voltage 1.5 v, 1% output current 200-ma dc, 300-ma peak output voltage transient deviation < 10%, 1-a/ s load step from 50 ma to 200 ma maximum ambient temperature 85 c 8.2.1.2 design considerations the tlv733p-q1 can provide post regulation after a dc-dc converter, as shown in figure 22 . for this application, input and output capacitors are required to achieve the output voltage transient requirements. capacitance values of 1 f are selected to give the maximum output capacitance in a small, low-cost package. 8.2.1.3 application curve figure 23 shows the tlv733p-q1 startup, regulation, and shutdown as specified in figure 22 . figure 23. 1.8-v to 1.5-v regulation at 300 ma tlv733p-q1 in out en gnd off on c out 1 f dc-dc converter load v out 1.5 v c in 1 f v out 1.8 v v out (500 mv/div) time (50 s/div) v in (500 mv/div) i out (100 ma/div)
16 tlv733p-q1 sbvs283d ? august 2016 ? revised december 2018 www.ti.com product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 8.2.2 capacitor-free operation from a battery input supply figure 24. capacitor-free operation from a battery input supply 8.2.2.1 design requirements table 3. design parameters parameter design requirement input voltage 3.0 v to 1.8 v (two 1.5-v batteries) output voltage 1.0 v, 1% input current 200 ma, maximum output load 100-ma dc maximum ambient temperature 70 c 8.2.2.2 design considerations the tlv733p-q1 can be directly powered off of a battery, as shown in figure 24 . an input capacitor is not required for this design because of the direct low impedance connection to the battery. eliminating the output capacitor allows for the minimal possible inrush current during startup, ensuring that the 200-ma maximum input current is not exceeded. 8.2.2.3 application curve figure 25 shows no inrush with the capacitor-free startup. figure 25. no inrush startup, 3.0-v to 1.0-v regulation load v bat tlv733p-q1 in out en gnd v out (500 mv/ div ) time (50 s/div) v in (1 v/ div ) i in (100 ma/ div )
17 tlv733p-q1 www.ti.com sbvs283d ? august 2016 ? revised december 2018 product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 9 power supply recommendations connect a low output impedance power supply directly to the in pin of the tlv733p-q1. inductive impedances between the input supply and the in pin can create significant voltage excursions at the in pin during startup or load transient events. if inductive impedances are unavoidable, use an input capacitor. 10 layout 10.1 layout guidelines ? place input and output capacitors as close to the device as possible. ? use copper planes for device connections, in order to optimize thermal performance. ? place thermal vias around the device to distribute the heat. figure 26 shows an example of how the tlv733p-q1 is laid out on a printed circuit board (pcb). 10.2 layout examples figure 26. wson layout example figure 27. sot-23 layout example input ground plane output ground plane grounded thermal plane grounded thermal plane input trace output trace enable trace input capacitor output capacitor designates thermal vias. thermal pad out gnd nc in nc en v out v in gnd plane represents via used for application specific connections 1 23 4 5 c out c in en
18 tlv733p-q1 sbvs283d ? august 2016 ? revised december 2018 www.ti.com product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated (1) for the most current package and ordering information see the package option addendum at the end of this document, or visit the device product folder on www.ti.com . (2) output voltages from 1.0 v to 3.3 v in 50-mv increments are available. contact the factory for details and availability. 11 device and documentation support 11.1 device support 11.1.1 development support 11.1.1.1 evaluation module an evaluation module (evm) is available to assist in the initial circuit performance evaluation using the tlv733p- q1. the tlv73312pevm-643 evaluation module (and related user guide ) can be requested at the texas instruments website through the product folders or purchased directly from the ti estore . 11.1.2 device nomenclature table 4. device nomenclature (1) (2) product v out tlv733p-q1 xx(x)pyyyz q1 xx(x) is the nominal output voltage. for output voltages with a resolution of 100 mv, two digits are used in the ordering number; otherwise, three digits are used (for example, 28 = 2.8 v; 125 = 1.25 v). p indicates an active output discharge feature. all members of the tlv733p-q1 family will actively discharge the output when the device is disabled. yyy is the package designator. z is the package quantity. r is for reel (3000 pieces), t is for tape (250 pieces). 11.2 receiving notification of documentation updates to receive notification of documentation updates, navigate to the device product folder on ti.com. in the upper right corner, click on alert me to register and receive a weekly digest of any product information that has changed. for change details, review the revision history included in any revised document. 11.3 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 11.4 trademarks e2e is a trademark of texas instruments. all other trademarks are the property of their respective owners. 11.5 electrostatic discharge caution this integrated circuit can be damaged by esd. texas instruments recommends that all integrated circuits be handled with appropriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 11.6 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions.
19 tlv733p-q1 www.ti.com sbvs283d ? august 2016 ? revised december 2018 product folder links: tlv733p-q1 submit documentation feedback copyright ? 2016 ? 2018, texas instruments incorporated 12 mechanical, packaging, and orderable information the following pages include mechanical, packaging, and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser-based versions of this data sheet, refer to the left-hand navigation.
package option addendum www.ti.com 12-dec-2018 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples pTLV73310PQDBVRQ1 active sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 ptlv73311pqdbvrq1 active sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 ptlv73312pqdbvrq1 active sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 ptlv73315pqdbvrq1 active sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 ptlv73318pqdbvrq1 active sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 ptlv73325pqdbvrq1 active sot-23 dbv 5 3000 tbd call ti call ti -40 to 150 ptlv73328pqdbvrq1 active sot-23 dbv 5 3000 tbd call ti call ti -40 to 150 ptlv73330pqdbvrq1 active sot-23 dbv 5 3000 tbd call ti call ti -40 to 150 ptlv73333pqdbvrq1 active sot-23 dbv 5 3000 tbd call ti call ti -40 to 150 TLV73310PQDBVRQ1 preview sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 tlv73310pqdrvrq1 active wson drv 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 150 12p tlv73311pqdbvrq1 preview sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 tlv73311pqdrvrq1 active wson drv 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 150 12q tlv73312pqdbvrq1 preview sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 tlv73312pqdrvrq1 active wson drv 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 150 12r tlv73315pqdbvrq1 preview sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 tlv73315pqdrvrq1 active wson drv 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 150 12s tlv73318pqdbvrq1 preview sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 tlv73318pqdrvrq1 active wson drv 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 150 12t tlv73325pqdbvrq1 preview sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 tlv73325pqdrvrq1 active wson drv 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 150 12u
package option addendum www.ti.com 12-dec-2018 addendum-page 2 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples tlv73328pqdbvrq1 preview sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 tlv73328pqdrvrq1 active wson drv 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 150 12v tlv73330pqdbvrq1 preview sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 tlv73333pqdbvrq1 preview sot-23 dbv 5 3000 tbd call ti call ti -40 to 125 tlv73333pqdrvrq1 active wson drv 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 150 12w (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) rohs: ti defines "rohs" to mean semiconductor products that are compliant with the current eu rohs requirements for all 10 rohs substances, including the requirement that rohs substance do not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, "rohs" products are suitable for use in specified lead-free processes. ti may reference these types of products as "pb-free". rohs exempt: ti defines "rohs exempt" to mean products that contain lead but are compliant with eu rohs pursuant to a specific eu rohs exemption. green: ti defines "green" to mean the content of chlorine (cl) and bromine (br) based flame retardants meet js709b low halogen requirements of <=1000ppm threshold. antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release.
package option addendum www.ti.com 12-dec-2018 addendum-page 3 in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. other qualified versions of tlv733p-q1 : ? catalog: tlv733p note: qualified version definitions: ? catalog - ti's standard catalog product
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant tlv73310pqdrvrq1 wson drv 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 q2 tlv73311pqdrvrq1 wson drv 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 q2 tlv73312pqdrvrq1 wson drv 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 q2 tlv73315pqdrvrq1 wson drv 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 q2 tlv73318pqdrvrq1 wson drv 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 q2 tlv73325pqdrvrq1 wson drv 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 q2 tlv73328pqdrvrq1 wson drv 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 q2 tlv73333pqdrvrq1 wson drv 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 q2 package materials information www.ti.com 12-dec-2018 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) tlv73310pqdrvrq1 wson drv 6 3000 203.0 203.0 35.0 tlv73311pqdrvrq1 wson drv 6 3000 203.0 203.0 35.0 tlv73312pqdrvrq1 wson drv 6 3000 203.0 203.0 35.0 tlv73315pqdrvrq1 wson drv 6 3000 203.0 203.0 35.0 tlv73318pqdrvrq1 wson drv 6 3000 203.0 203.0 35.0 tlv73325pqdrvrq1 wson drv 6 3000 203.0 203.0 35.0 tlv73328pqdrvrq1 wson drv 6 3000 203.0 203.0 35.0 tlv73333pqdrvrq1 wson drv 6 3000 203.0 203.0 35.0 package materials information www.ti.com 12-dec-2018 pack materials-page 2
generic package view images above are just a representation of the package family, actual package may vary. refer to the product data sheet for package details. drv 6 wson - 0.8 mm max height plastic small outline - no lead 4206925/f
www.ti.com package outline c 6x 0.35 0.25 1.6 0.1 6x 0.3 0.2 2x 1.3 1 0.1 4x 0.65 0.8 0.7 0.05 0.00 b 2.1 1.9 a 2.1 1.9 (0.2) typ wson - 0.8 mm max height drv0006a plastic small outline - no lead 4222173/b 04/2018 pin 1 index area seating plane 0.08 c 1 3 4 6 (optional) pin 1 id 0.1 c a b 0.05 c thermal pad exposed 7 notes: 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3. the package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. scale 5.500
www.ti.com example board layout 0.07 min all around 0.07 max all around (1) 4x (0.65) (1.95) 6x (0.3) 6x (0.45) (1.6) (r0.05) typ ( 0.2) via typ (1.1) wson - 0.8 mm max height drv0006a plastic small outline - no lead 4222173/b 04/2018 symm 1 3 4 6 symm land pattern example scale:25x 7 notes: (continued) 4. this package is designed to be soldered to a thermal pad on the board. for more information, see texas instruments literature number slua271 (www.ti.com/lit/slua271). 5. vias are optional depending on application, refer to device data sheet. if some or all are implemented, recommended via locations are shown. solder mask opening solder mask metal under solder mask defined metal solder mask opening solder mask details non solder mask defined (preferred)
www.ti.com example stencil design 6x (0.3) 6x (0.45) 4x (0.65) (0.7) (1) (1.95) (r0.05) typ (0.45) wson - 0.8 mm max height drv0006a plastic small outline - no lead 4222173/b 04/2018 notes: (continued) 6. laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. ipc-7525 may have alternate design recommendations. solder paste example based on 0.125 mm thick stencil exposed pad #7 88% printed solder coverage by area under package scale:30x symm 1 3 4 6 symm metal 7

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